Poly SPARC

The Interrupt from the motor controller to the CPU needs to be high for 1 clock cycle. There is not interrupt acknowledge signal from the Open8 CPU that can turn off the interrupt after 1 clock signal. If the motor controller interrupt is more than one clock cycle, The CPU interprets it as a separate request. So there is a need for a moderator that  Receives an interrupt request from the motor controller Responds to the interrupt by sending a signal to the CPU interrupt line which is high for exactly one clock cycle.  After sending the interrupt request to the CPU, sends an interrupt acknowledge signal to the motor controller.  This moderator is Int_req_ack module. The Int_req_ack module has a 2 bit counter which is initialized to “00”.  When the motor interrupt goes high, the counter is incremented by 1 every clock cycle and the interrupt_CPU line goes high. Since we need the interrupt_CPU line to be high for exactly one clock signal, the counter is rese...

SPECIFICATION: The motor  controller is provided with a control word from the open8 micro controller. The control word is 8 bits wide, bits 3 down to 0 represents the number of steps that is to be moved. Bits 5,4 selects the motor that is to be rotated and bit 6 is used to select the direction of rotation (forward or reverse). Bit 7 is used for selecting between interrupting or not interrupting the microcontroller after task is completed. Contorl word (8 bits) - control_word_reg 1.Bits 3 down to 0 – Number of steps to be rotated (step_counter) “1111” - 15 steps (example) 2.Bits 5 down to 4 – (select) The Motor that is to be rotated (Motor_select) Control_word(5) = 1, left motor is selected Control_word(4) = 1, right motor is selected Control_word(5,4) = “11”, both motors are selected Control_word(5,4) = “00”, No motor is selected 3.Bit 6 – Direction of rotation of the selected motor(s) (Motor_direction)  Control_word(6) =  0, forward direction of rotation  Co...

The motor controller is the interface to the stepper motor. Stepper motor has four coils. The coils of the stepper motor are to be energized as follows for it to rotate forward. Stepper motor operation So to rotate the stepper motor in the “forward direction”, the sequence 1100 is to be right shifted by one bit for each step. A step is defined as the linear distance traveled when the sequence is shifted right by one bit. To rotate the stepper motor in the “reverse direction”, the sequence 1100 is to be shifted left by one bit for each step. Thus the operation involving rotation of the stepper motor is shifting the sequence 1100 right or left onto the coils of the stepper motor. An encoder provides feedback upon completion of one step rotation. The feedback signal is used as an indicator to shift the next pattern in. Step Angle: There are 4 steps in 360 degrees. Hence the step angle is 90 degrees step angle = 360/4 = 90 if the diameter of the wheel is 5 cm, the distance ...

The open8 core is to be modified to interface with the memory. The modification is described here. REFERENCE TO THE OPEN8 INSTRUCTION SET GUIDE Description : There is an implementation change to the open8 core so as to interface it with the memory provided with us. The implementation change is for instructions RTI (return from interrupt) and RTS(return from subroutine). BUG 1. The interrupt occurs 2. There are 3 bytes that are stored in the stack The PSR and the 16 bit memory return address. They are stored in memory locations 127, 126, 125. This is with accordance with the Instruction set guide. 3. After stack operations is done, it  jumps to the ISR. ISR is pointed to location pointed to in memory by 129,128 as specified in the Assembly language reference manual. 4. In the ISR, it continues to execute code and when I use the RTI instruction, the control does not resume execution from where it left off. Instead it starts executing form location 0. 5. When RTI is executed...

A 256 byte memory model is described in VHDL to using on chip BRAM for testing on FPGA board. It is interfaced with the Open8 soft processor. It is used as both program memory and data memory. The program can be loaded in binary into the memory, interfaced with open8 and can be simulated using modelsim. 1. Using the BRAM in the FPGA board as program memory/Data memory. Memory Size open8 has 16 bit address lines. I have implemented a 256 byte RAM (Uses the internal BRAM of the spartan3 FPGA) to connect it to the FPGA. The memory entity is described below ----------------------------------------------------------------------------- -- Memory: RAM -- Desc: Instruction/ data memory -- no of entries : 256 bytes -- no of bits    : 8 -- we - write enable -- re - read enable -- en - select memory -- addr - address(8 bits) -- di - data in  (8 bits) -- do - data out (8 bits) ------------------------------------------------------------------------------ entit...

PROJECT : It was required to build a system on chip using the following components 1.An open core from www.opencores.org 2.A custom block implementing a functionality 3.A memory which is generated by a memory generator built by professor Garrett Rose. I read through different topics but my interest in robotics kicked in when I read a paper on subsumption architecture described in the paper “A Robust Control System for Mobile Robots” by the famous H.A. Brooks from the AI lab at MIT. INTRODUCTION Subsumption architecture is a layered architecture for building control systems for robots. The  control system is composed of number of individual layers. Each layer performs a function independent  of the other layers. For example consider a robot composed of the following layers Layer 0: Obstacle avoidance Layer 1: Wandering Layer 2: moving towards an object of interest Layer 0 is the lower most layer, There is a processor just for this layer that receives input from the se...