Poly SPARC

In order to study the Instruction Fetch Unit, I thought the RTL schematic view of ISE would be a useful tool. So i collected all the necessary files to synthesize the Instruction Fetch Unit alone of the OpenSPARCT1 core. Here I document the steps The files that are required for IFU are present in OpenSPARCT1/design/sys/iop/sparc/rtl/Flist.ifu Xilinx 10.1 is to be used. Steps 1. Open xilinx10.1 2. create a new project IFU_Sparc 3. Open OpenSPARCT1/design/sys/iop/sparc/rtl/Flist.ifu 4. Add all the files that are specified in the file to the new project 5. Add all the files that are present in design/sys/iop/sparc/ifu/rtl 5. Add all the header files present in /opensparc/design/sys/iop/include 6. Added all the files inside design/sys/common/rtl to the project (simplicity sake) 7. Add all files inside design/sys/srams/ to the project (simplicity sake) 8. Add files OpenSPARCT1/lib/u1.behV and OpenSPARCT1/lib/m1.behV. Rename the files to u1behV.v and m1behV.v so that they are ...

INSTALLING BINUTILS package Shifted to www.linuxfromscratch.org - Linux From Scratch - version 6.8 (the book was outdated so shifting to the website by the same other) - It starts with installation of binutils and not BASH. no problem though. The main modifications I made is shifted the sources from /usr/src to a dedicated folder at $LFS/sources The location where the tools are to be installed is $LFS/tools. A symbolic link is created for the same in the host systems INSTALLATION OF BINUTILS check for $LFS, $LFS_TGT else export LFS=/mnt/lfs export LFS_TGT=$(uname -m)-lfs-linux-gnu 1. download the Binutils-2.21.tar.gz into the $LFS/sources 2. tar xvzf binutils-2.21.tar.gz - extracts into a folder called binutils-2.21 3. mkdir $LFS/sources/binutils-build 4. cd $LFS/binutils-build 5. ../binutils-2.21/confiure --targer=$LFS_TGT --prefix=/tools --disable-nls --disable-werror 6. make 7. make install LFS_TGT contains the description of the system. The config.guess inside b...

DOWNLOADING  REQUIRED PACKAGES 1. Downloading bash - (bash-4.2) http://ftp.gnu.org/gnu/bash/ - download the latest tar.gz file. I downloaded bash-4.2.tar.gz It is put inside the folder $LFS/usr/src * as root (sudo -i) cd into the folder $LFS/usr/src/bash-4.2 * ./configure --enable-static-link --prefix=$LFS/usr --disable-nls --without-bash-malloc * make +ERROR: /usr/lib/gcc/i486-linux-gnu/4.4.1/../../../../lib/libc.a(malloc.o): In function `malloc': (.text+0x4ad0): multiple definition of `malloc' ./lib/malloc/libmalloc.a(malloc.o):/mnt/lfs/usr/src/bash-4.2/lib/malloc/malloc.c:1254: first defined here +SOLUTION: ./configure --enable-static-link --prefix=$LFS/usr --disable-nls --without-bash-malloc (INCLUDE "--without-bash-malloc") in the configure option. +REFERENCE: http://www.linuxforums.org/forum/programming-scripting/129616-multiple-definitions-compliling-error.html +make succeded * make prefix=$LFS/usr install * mv $LFS/usr/bin/b...

These steps are quite straight forward no errors were encountered. Follow the procedure described in http://www.linuxfromscratch.org/lfs/view/stable/chapter02/chapter02.html CREATING A PARTITION I used Gparted tool to create the partition. The tool is quite straight forward to use. You can download it from the package manager. here is the tutorial -  http://www.dedoimedo.com/computers/gparted.html Created a partition using the steps described here http://www.linuxfromscratch.org/lfs/view/stable/chapter02/creatingpartition.html Created a partition - 50 GB /dev/sda1 (primary partition)                         3 GB /dev/sda4 (primary partition for swap) (note : in my system I have linux (Ubuntu 9.10 karmic koala) installed in logical partition sda5 and swap is in logical parition sda6. primary partition sda2 is extended to create logical partitions.) MOUTING THE NEW PARTITION mkdir /mnt/lfs mount /dev/sd...

hi, For long I wanted to build a custom linux system from scratch. Since now I am in my summer hols, I finally find time to do it. I am doing it for a hobby and documenting the procedure I followed, errors that I got and how I have solved them if I have solved them. Hope this documentation serves useful to the people. IMPORTANT - describes the variables that are used, 1. sudo -i is used to go into the superuser mode in ubuntu 2. $LFS = /mnt/lfs - the partition where linux is being built from scratch is mounted into this location 3. all the packages that are to be installed are to be present in $LFS/usr/src 4. $LFS_TGT=$(uname -m)-lfs-linux-gnu INDEX 1. Creating a partition 2. Mounting the partition 3. Creating Directories based on the File Hierarchy Standards (FHS) 4. Installing Bash 5. Installing Bin utils

OBSTACLE AVOIDANCE SOC - Layer 0 of subsumption architecture (PROJECT) INDEX Introduction Interface between open8 and memory Modification to open8 core to interface with the memory Motor controller top level diagram Motor controller operation  Motor controller to CPU interrupt interface Synthesis and verification of Motor controller   Interfaced Design SOC Encounter for automated layout generation This project is put over here as a reference for people to understand the ASIC design flow using Cadence tools. Abishek Ramdas NYU Poly

******************************************************************** Quasi Random Number Generator Abishek Ramdas ******************************************************************** Single threaded implementation File name - quasi_rand_gen_modification.c How to run - at the command prompt $gcc quasi_rand_gen_modification.c (return) $./a.out (return) Output: Requests:  Number of patterns to be generated and Dimensions File - QRNG_Patterns_sngl_thrd.txt in the same folder which contains the C file. ******************************************************************** Multiple threaded implementation File name - quasi_rand_gen_pthreads.c How to run - at the command prompt $gcc -pthread quasi_rand_gen_modification.c (return) $./a.out (return) Output: Requests:  Number of patterns to be generated, Dimensions and Number of cores File - QRNG_Patterns_pthreads.txt in the same folder which contains the C file. ********************************************...

#include<stdio.h> #include<stdlib.h> #include<error.h> #include<errno.h> #include"nrutil.h" #define MAXBIT 30 #define MAXDIM 6 #define DEBUG 1 void sobseq(int *, float []); int main(int argc, char *argv[]) {   int n,i;   float x[100];   for(i=0;i<100;i++)     x[i]=0;   n=-1;   sobseq(&n,x);   //  for(i=0;i<100;i++)   //  printf("%f",x[i]);   n=4;   sobseq(&n,x);   for(i=0;i<100;i++)     printf("%f\n",x[i]);  n=5;   sobseq(&n,x);   for(i=0;i<100;i++)     printf("%f\n",x[i]);   return 0; } void sobseq(int *n,float x[]) {   int j,k,l;   unsigned long i,im,ipp;   static float fac;   static unsigned long in,ix[MAXDIM+1],*iu[MAXBIT+1];   static unsigned long mdeg[MAXDIM+1]={0,1,2,3,3,4,4};   static unsigned long ip[MAXDIM+1]={0,0,1,1,2,1,4};   stat...

/* ******************************************************************** Quasi Random Number Generator - serial version Abishek Ramdas ******************************************************************** Inputs : 1. Number of patterns (limit 64000) can be varied by varying the LIM paramter 2. Number of dimensions Outputs: All patterns are stored in file QRNG_Patterns_sngl_thrd.txt the patterns are printed along the x axis and the dimensions are along y axis ******************************************************************** */ #include<stdio.h> #include<stdlib.h> #include<error.h> #include<errno.h> #include"nrutil.h" #define LIM 64000 //limitng the number of patterns generated to max of 64000 #define MAXBIT 30 #define MAXDIM 6 #define DEBUG_INIT 0 #define DEBUG_SEED 0 #define DEBUG_SOBOL 0 #define DEBUG_SOBOL_E 0 float random_numbers[MAXDIM][LIM];//dynamic declaration of 2D array is not possible int main(int argc, char ...

The netlist for the interfaced design is available. This is to be ported into SOC encounter to generate a layout. Design methodology – top down The design is synthesized so as to define the components in standard cells of the OSU 25 library. This synthesized netlist is imported to encounter to generate the layout. The Steps for chip planning in Encounter are 1.Import netlist 2.Floor plan 3.Create a black box partition of the memory 4.Power planning 5.specify modules and black boxes position on the chip 6.special route 7.Run placement 8.Assign pins for the black box 9.Run trial route – analyze for congestion 10.Run nano route 1. IMPORT NETLIST     The synthesized netlist is imported into encounter and the osu25_stdcells.lef and osu25_stdcells.tlf libraries are mapped. The power nets and ground nets are specified to be “vdd” and “gnd”. 2. FLOOR  PLANNING The sizes of the individual modules were measured for a total utilization of 70%. A memory gen...

This post is about interfacing all the modules of the obstacle avoidance project and optimization techniques. The design is inter connected in the HDL description itself. The memory is defined as a black box. A black box in VHDL is an entity without an architecture. Since the memory is to be added later, it is described as a black box. The VHDL files for the interfaced design is sourced into the RTL compiler. As you can see, a lock to the side of the memory module. This shows that the memory is a black box. The netlist is generated for this design using RTL Compiler. The next step is verification of this netlist. But since the memory is not available, it cannot be tested. DESIRED FREQUENCY OF OPERATION The desired frequency of operation was set to 0.5 GHz (2000 ps). The clock was set to this requency using the set clock command of RTL compiler. The worst negative slack is calculated.  It is seen that for a frequency of 0.5 GHz, the worst negative slack is -1406 ps and henc...

The Flow of Asic design is 1. RTL Description 2. Simulation and testing of functionality 3. Synthesis of netlist using RTL Compiler 4. Verification of resultant netlist The HDL Description of the motor controller is available. The next step is to synthesize it to a netlist made up of the standard cells. The library used is the osu025_stdcells.lib The HDL files for the motor controller are read by the RTL Compiler. The following lines are added to a tcl file which is then sourced from the RTL Compiler File : rtl.tcl set_attribute lib_search_path /path_to/cadence/local/osu_soc_v2.7/cadence/lib/tsmc025/signalstorm read_hdl -vhdl  ../HDL/motor_controller.vhd (location of motor controller) elaborate synthesize -to_mapped write -mapped > motor_controller.v write_script > script This script was edited and sourced in the RTL compiler to synthesize the motor controller for verification. Note: no optimization parameters are specified. as you can see the synthe...