Tuesday, October 30, 2012

Synthesizing the individual modules of OpensparcT1 - RSYN

rsyn compiles all the files using design compiler. The default library used is lsi_10k.db
  1. Open Design and verification guide
  2. In the quick start section 1.3.1 follow unzip and untar commands
  3. cd to the folder untared
  4. Open the OpenSPARC.cshrc script
  5. Edit the document to set up the environment for openSPARC.cshrc
  6. synopsys libraries - /opt/synopsys/syn
  7. sparcos5 libraries -
  8. I was not able to find the libraries at the place mentioned in the document so I used to locate command to locate sparcos5 libraries
  9. locate sparcOS5
  10. source the .tcshrc_synopsys file (it contains the license file in my case)
  11. source OpenSPARCT1.cshrc file
  12. rsyn -all

If everything runs well you can find
  1. In the folder of every component (analog/*, ccx/* etc) you can find a folder called synopsys
  2. Inside that folder you will have log files for commands and design compiler
  3. A gate folder which contains the compiled, flattened and hierarchical netlist
  4. A log folder which contains the area report for that cell

Runs well till the module ctu is being synthesized
Abort at 51
Fatal: Internal system error, cannot recover.

Googled this error and found

He says
I sorted this error it has to do with the fact that the read_file function in DC "Cannot pass parameters (must use directives in HDL)" as documented in table 6-2 of this pdf file http://www.vlsiip.com/dc_shell/dcug_6.pdf this means that the scripts for JBI and CTU must be edited. So with the CTU module the file ctu_revision.v has to be excluded from the "rtl_files" list at the top of the user_cfg.scr script (found in... /design/sys/iop/ctu/synopsys/script directory) and the following lines added at the bottom of the script:

read_file -format verilog -define RUNDC $dv_root/design/sys/iop/ctu/rtl/ctu_jtag_id.v
analyze -format verilog $dv_root/design/sys/iop/ctu/rtl/ctu_jtag_id.v
elaborate ctu_jtag_id

read_file -format verilog -define RUNDC $dv_root/design/sys/iop/ctu/rtl/ctu_mask_id.v
analyze -format verilog $dv_root/design/sys/iop/ctu/rtl/ctu_mask_id.v
elaborate ctu_mask_id

read_file -format verilog -define RUNDC $dv_root/design/sys/iop/ctu/rtl/ctu_revision.v
analyze -format verilog $dv_root/design/sys/iop/ctu/rtl/ctu_revision.v
elaborate ctu_revision ”

Works you need to do the same for more than one file . The files that fail need to be analyzed and elaborated. See appendix for sample user_cfg.scr file for ctu.
Everytime it fails, I go to the filename.log file in /design/sys/iop/ctu/synopsys and look at the last file that is executed. I then remove that line form the script file and added it at the end of the script in the format mentioned above.

Have fun,

No comments:

Post a Comment