Wednesday, May 18, 2011

OpenSPARCT1 - Synthesizing only the Instruction Fetch Unit in ISE

In order to study the Instruction Fetch Unit, I thought the RTL schematic view of ISE would be a useful tool. So i collected all the necessary files to synthesize the Instruction Fetch Unit alone of the OpenSPARCT1 core. Here I document the steps


The files that are required for IFU are present in OpenSPARCT1/design/sys/iop/sparc/rtl/Flist.ifu

Xilinx 10.1 is to be used.
Steps
1. Open xilinx10.1
2. create a new project IFU_Sparc
3. Open OpenSPARCT1/design/sys/iop/sparc/rtl/Flist.ifu
4. Add all the files that are specified in the file to the new project
5. Add all the files that are present in design/sys/iop/sparc/ifu/rtl
5. Add all the header files present in /opensparc/design/sys/iop/include
6. Added all the files inside design/sys/common/rtl to the project (simplicity sake)
7. Add all files inside design/sys/srams/ to the project (simplicity sake)
8. Add files OpenSPARCT1/lib/u1.behV and OpenSPARCT1/lib/m1.behV. Rename the files to u1behV.v and m1behV.v so that they are identified as verilog files. make sure they are added to the project

The next step is to set the compile time macros: To do this:
(make sure "sparc_ifu.v" is the top module)
1. Look for the ISE sub-window on the left labeled "Processes"
2. Find the "Synthesize-XST" entry in that window
3. Right click on that entry and select "Properties"
4. In the popup window "Process Properties - Synthesis Options,
select "synthesis options in the left window
5. Set the property display level to "Advanced"
6. In the right list scroll down to find the property
"Verilog Macros"
7. Type the value FPGA_SYN FPGA_SYN_1THREAD FPGA_SYN_NO_SPU FPGA_SYN_8TLB in that box.
8. now DESELCT "process->properties->xilinx specification options->add i/o buffers"
9. Synthesize
10. View RTL schematic.

Error: bw_r_irf_register not found
Find the file bw_r_irf_register in the sources window of ISE
set it as the top module and synthesize
set sparc_ifu.v as the top module and resynthesize

2 comments:

  1. Hi Abhishek ,

    Your blog was really informative .Liked to know whether we can load an android OS in SPARC core .

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  2. The manual doesnt mention android OS. I think it must be possible to load the android OS onto the Sparc. Not sure though

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