Saturday, March 5, 2011

Detailed Description of RXIL of OpenSPARC - Abishek Ramdas

RXIL 1.# PERL SCRIPT FLOW OF CONTROL
by Abishek Ramdas NYU Poly

SYNOPSYS
         The RXIL1.2 version of the perl script is described here. This perl script is invoked by the rxil command followed by paramenters for xilinx synthesis. Visit the design and verification guide for details on running the rxil command for xilinx.

     The rxil command is located inside OpenSPARCT1/tools/bin/rxil. It is a bash script. There are different versions of rxil (perl script) if you look inside OpenSPARCT1/tools/perlmod/ (ex rxil,1.0 ,rxil,1.1 ,rxil,1.2). rxil bash script is used to find the latest version of rxil perl script and transfer control to that script. This bash script calls the  configsrch script to searcg for the latest configuration of rxil. ( it executes configsrch rxil /). It is also used to identify the machine and set the environment variable PERL5OPT according to the machine. This script then calls the current version of rxil(perl script) and transfers control.

         The files identifies the device and the list of all the blocks that are to be synthesised. It creates a work directory and creates NGC and verilog netlist files for different modules that are specified. The same procedure is followed for any device selected. The common errors are also noted and their corrective measures are provided.
         The file consists of two parts. “Run through the command line arguments” and “running part of rxil script”. The first part identifes the command line arguments that are given and follows a course of operation depending on the arguments that are specified. The second part is responsible for creation of
NGC and verilog files.

RUN THROUGH THE COMMAND LINE ARGUMENTS

Parameters
1.
-device  if this parameter is used, the device xst file is checked foravailabitlity.
         The list of devices that are supported are (also depends on the Xilinx Synthesis Tool (XST) version on your machine, for our case we use 10.1.03.         There is some migration problem if you are using xilinx 12.2)
         XC4VFX100 XC4VLX200 XC5VLX110 XC5VLX220
         XC2VP70 XC4VFX60 XC5VLX110T XC5VLX155T XC5VLX330T
         the default device is XC4VLX200(specified in the rxil using variable $device)
         this list is available in OpenSPARC/design/sys/xst folder. The device.xst files are present.

         if the following error occurs
         ERROR RXIL : Device #device is not found !!!
         then check that you are using one of the devices mentioned above.
----------------------------------------------------------------------------------------------------------------------------
2. if the blocks are directly specified as arguments,
     Then blocks specified in the command line are pushed into a local array called block by the rxil script
         the modules that are specified in the command line are compared with the entries in
         OpenSPARC/design/sys/xst/block.list . if they are present in the block.list then the blocks are
         added into another array called block.list

         the different modules are present in the OpenSPARCT1/design/sys/iop folder. The different
         modules are
         analog ccx2mb common dram fpu iobdg pads rtl scdata sparc ccx cmp ctu efc include jbi pr_macro scbuf sctag srams

         of these the block.list contains only these modules namely these are the main modules that are
         to be synthesised. these modules use the above mentioned modules in its implementation.
         srams/bw_r_dcd
         srams/bw_r_frf
         srams/bw_r_icd
         srams/bw_r_idct
         srams/bw_r_irf_register
         srams/bw_r_irf
         srams/bw_r_rf16x160
         srams/bw_r_rf16x32
         srams/bw_rf_16x65
         srams/bw_rf_16x81
         srams/bw_r_rf32x152b
         srams/bw_r_rf32x80
         srams/bw_r_scm
         srams/bw_r_tlb
         sparc
         fpu
         ccx
         these modules utilize the verilog files found in the above mentioned modules of the iop folder.
         For example ccx uses verilog files from common, analog etc

         RXIL ERROR : No matching modules found.
         if you get this error make sure you have enterd the module names correctly. you can enter them
         either as given in the block.list or just module name. that is parameter srams/bw_r_icd and
         bw_r_icd is the same. the script takes care of unwanted white space characters and "srams/" of
         srams/bw_r_icd
         In the end all the modules that are specified in the argument list that match with those present in
         the block.list are added to an array @block_list
----------------------------------------------------------------------------------------------------------------------------
-h (-help)
                 If -h or -help is given as the parameter then help menu is opened and perl script is exited.
----------------------------------------------------------------------------------------------------------------------------
-all
     If -all is the parameter specified then the file OpenSPARC/design/sys/xst/block.list is opened for reading.
         the modules that are specified in this file are loaded into an array called block_list

         RXIL ERROR: No Matching modules found
         make sure parameter when running rxil is specified as either -all or blocks from the
         OpenSPARC/design/sys/xst/block.list file. read 2 and 4 points
-----------------------------------------------------------------------------
RUNNING PART OF RXIL SCRIPT

   1. The modules for synthesis are present in the array block_list.
   2. Each module has an xst folder
   3. Inside the xst folder of each module a directory in the name of the device that is selected is created.
   4. Each module has a flist file. the flist file indicates the verilog files that are utilized by the module and the header files. look into the flist file of the modules mentioned in the block_list.
   5. This flist file of each module is copied into the device directory that is created.
   6. The files that are specified in this flist are then printed out on the screen.
   7. Inside the device directory, a "xst" folder and a projnav.tmp folder is created inside the xst folder. A block.lso is ascii text is created and "work" is put inside the folder
   8. The xst file of the device selected is copied from OpenSPARC/design/sys/xst to the block_dir if it is not available in the device folder of the module. It is also modified to suit the conditions required for the particular block.
   9. This xst file is the virtex_file.the details of the virtex file are shown on the screen.
   10. The command 'xst_cmd'-ifn $vertex_file is executed on the particular device xst file that is choosen. ngc and v files are created using netgen_cmd and xst_cmd commands.
Rxil.1.2 perl script

Reference
   1. Knowledge on regular expressions in perl. Look in here
        http://www.troubleshooters.com/codecorn/littperl/perlreg.htm#op_=~
   2. http://www.opensparc.net/opensparc-t1/download.html to download the opensparct1 core
   3. Running rxil – my earlier document. To run the rxil without errors
   4. Rxil general information – my earlier document.
   5. OpenSPARC/tools/perlmod/rxil1.2 – the perl script under consideration.

1 comment:

  1. Hiii Abhishek...
    I am Varun..
    I want to implement openSPARC t1 processor on fpga..
    Is it possible to implement it using windows environment or i have to use linux???
    Can u give me flow means how to start implementing???
    Thank u...

    ReplyDelete